The present invention generally relates to the preparation of semiconductor grade single crystal silicon which is used in the manufacture of electronic components. More particularly, the present invention relates to a process for producing a single crystal silicon ingot which is substantially devoid of agglomerated intrinsic point defects over the entire crystal radius and usable length of the ingots.
Single crystal silicon, which is the starting material for most processes for the fabrication of semiconductor electronic components, is commonly prepared by the so-called Czochralski ("Cz") method. In this method, polycrystalline silicon ("polysilicon") is charged to a crucible and melted, a seed crystal is brought into contact with the molten silicon and a single crystal is grown by slow extraction. After formation of a neck is complete, the diameter of the crystal is enlarged by decreasing the pulling rate and/or the melt temperature until the desired or target diameter is reached. The cylindrical main body of the crystal which has an approximately constant diameter is then grown by controlling the pull rate and the melt temperature while compensating for the decreasing melt level. Near the end of the growth process but before the crucible is emptied of molten silicon, the crystal diameter must be reduced gradually to form an end-cone. Typically, the end-cone is formed by increasing the crystal pull rate and heat supplied to the crucible. When the diameter becomes small enough, the crystal is then separated from the melt.
In recent years, it has been recognized that a number of defects in single crystal silicon form in the crystal growth chamber as the crystal cools after solidification. Such defects arise, in part, due to the presence of an excess (i.e., a concentration above the solubility limit) of intrinsic point defects in the crystal lattice, which are vacancies and self-interstitials. Silicon crystals grown from a melt are typically grown with an excess of one or the other type of intrinsic point defect, either crystal lattice vacancies ("V") or silicon self-interstitials ("I"). It has been suggested that the type and initial concentration of these point defects in the silicon are determined at the time of solidification and, if these concentrations reach a level of critical supersaturation in the system and the mobility of the point defects is sufficiently high, a reaction, or an agglomeration event, will likely occur. Agglomerated intrinsic point defects in silicon can severely impact the yield potential of the material in the production of complex and highly integrated circuits.
Vacancy-type defects are recognized to be the origin of such observable crystal defects as D-defects, Flow Pattern Defects (FPDs), Gate Oxide Integrity (GOI) Defects, Crystal Originated Particle (COP) Defects, crystal originated Light Point Defects (LPDs), as well as certain classes of bulk defects observed by infrared light scattering techniques such as Scanning Infrared Microscopy and Laser Scanning Tomography. Also present in regions of excess vacancies are defects which act as the nuclei for ring oxidation induced stacking faults (OISF). It is speculated that this particular defect is a high temperature nucleated oxygen agglomerate catalyzed by the presence of excess vacancies.
Defects relating to self-interstitials are less well studied. They are generally regarded as being low densities of interstitial-type dislocation loops or networks. Such defects are not responsible for gate oxide integrity failures, an important wafer performance criterion, but they are widely recognized to be the cause of other types of device failures usually associated with current leakage problems.
The density of such vacancy and self-interstitial agglomerated defects in Czochralski silicon is conventionally within the range of about 1*10.sup.3 /cm.sup.3 to about 1*10.sup.7 /cm.sup.3. While these values are relatively low, agglomerated intrinsic point defects are of rapidly increasing importance to device manufacturers and, in fact, are now seen as yield-limiting factors in device fabrication processes.
To date, there generally exists three main approaches to dealing with the problem of agglomerated intrinsic point defects. The first approach includes methods which focus on crystal pulling techniques in order to reduce the number density of agglomerated intrinsic point defects in the ingot. This approach can be further subdivided into those methods having crystal pulling conditions which result in the formation of vacancy dominated material, and those methods having crystal pulling conditions which result in the formation of self-interstitial dominated material. For example, it has been suggested that the number density of agglomerated defects can be reduced by (i) controlling v/G.sub.0 to grow a crystal in which crystal lattice vacancies are the dominant intrinsic point defect, and (ii) influencing the nucleation rate of the agglomerated defects by altering (generally, by slowing down) the cooling rate of the silicon ingot from about 1100.degree. C. to about 1050.degree. C. during the crystal pulling process. While this approach reduces the number density of agglomerated defects, it does not prevent their formation. As the requirements imposed by device manufacturers become more and more stringent, the presence of these defects will continue to become more of a problem.
Others have suggested reducing the pull rate, during the growth of the body of the crystal, to a value less than about 0.4 mm/minute. This suggestion, however, is also not satisfactory because such a slow pull rate leads to reduced throughput for each crystal puller. More importantly, such pull rates lead to the formation of single crystal silicon having a high concentration of self-interstitials. This high concentration, in turn, leads to the formation of agglomerated self-interstitial defects and all the resulting problems associated with such defects.
A second approach to dealing with the problem of agglomerated intrinsic point defects includes methods which focus on the dissolution or annihilation of agglomerated intrinsic point defects subsequent to their formation. Generally, this is achieved by using high temperature heat treatments of the silicon in wafer form. For example, Fusegawa et al. propose, in European Patent Application 503,816 A1, growing the silicon ingot at a growth rate in excess of 0.8 mm/minute, and heat treating the wafers which are sliced from the ingot at a temperature in the range of 1150.degree. C. to 1280.degree. C. to reduce the defect density in a thin region near the wafer surface. The specific treatment needed will vary depending upon the concentration and location of agglomerated intrinsic point defects in the wafer. Different wafers cut from a crystal which does not have a uniform axial concentration of such defects may require different post-growth processing conditions. Furthermore, such wafer heat treatments are relatively costly, have the potential for introducing metallic impurities into the silicon wafers, and are not universally effective for all types of crystal-related defects.
A third approach to dealing with the problem of agglomerated intrinsic point defects is the epitaxial deposition of a thin crystalline layer of silicon on the surface of a single crystal silicon wafer. This process provides a single crystal silicon wafer having a surface which is substantially free of agglomerated intrinsic point defects. Epitaxial deposition, however, substantially increases the cost of the wafer.
In view of these developments, a need continues to exist for a method of single crystal silicon preparation which acts to prevent the formation of agglomerated intrinsic point defects by suppressing the agglomeration reactions which produce them. Rather than simply limiting the rate at which such defects form, or attempting to annihilate some of the defects after they have formed, a method which acts to suppress agglomeration reactions would yield a silicon substrate that is free or substantially free of agglomerated intrinsic point defects. Such a method would also afford single crystal silicon wafers having epi-like yield potential, in terms of the number of integrated circuits obtained per wafer, without having the high costs associated with an epitaxial process.
It is now recognized that silicon single crystal ingots can be grown which have virtually no defects produced by agglomeration of intrinsic point defects. (See, e.g., PCT/US98/07365 and PCT/US98/07304.) A primary mechanism for the suppression of agglomeration reactions is the radial out-diffusion of intrinsic point defects. If given sufficient time at crystal temperatures in excess of the temperature T.sub.A at which agglomeration reactions will occur, self-interstitials and vacancies will either combine and annihilate each other or diffuse to sinks on the surface of the ingot.
Silicon self-interstitials appear to be extremely mobile at temperatures near the solidification temperature of silicon, i.e., about 1410.degree. C. This mobility, however, decreases as the temperature of the single crystal silicon ingot decreases. Generally, the diffusion rate of self-interstitials slows such a considerable degree that they ate essentially immobile for commercially practical time periods at temperatures less than about 700.degree. C., and perhaps at temperatures as great as 800.degree. C., 900.degree. C., 1000.degree. C., or even 1050.degree. C.
It is to be noted in this regard that, although the temperature at which a self-interstitial agglomeration reaction occurs may in theory vary over a wide range of temperatures, as a practical matter this range appears to be relatively narrow for conventional, Czochralski-grown silicon. This is a consequence of the relatively narrow range of initial self-interstitial concentrations which are typically obtained in silicon grown according to the Czochralski method. In general, therefore, a self-interstitial agglomeration reaction may occur, if at all, at temperatures (T.sub.A) within the range of about 1100.degree. C. to about 800.degree. C., and typically at a temperature of about 1050.degree. C.
By controlling the cooling rate of the ingot within a range of temperatures in which self-interstitials appear to be mobile, the self-interstitials may be given more time to diffuse to sinks located at the crystal surface, or to vacancy dominated regions, where they may be annihilated. The concentration of such interstitials may therefore be suppressed to a level low enough so that supersaturation of self-interstitials (i.e., a concentration above the solubility limit) does not occur at a temperature at which the self-interstitials are sufficiently mobile to agglomerate. The same principles apply for silicon vacancies. However, the relative immobility of the vacancies makes their outdiffusion more difficult.
It would be possible to produce single crystal ingots free of agglomerated micro-defects in presently existing crystal pullers, but there are a number of contradictory conditions present in the operation of the crystal puller and the ingot. Difficult compromises must be made, which materially impact the commercial practicality of the production of defect-free single crystal ingots. Growth of a single crystal silicon ingot is schematically illustrated in FIG. 1. Silicon solidifies from the melt into the ingot at a temperature of about 1410.degree. C. and is thereafter continuously cooled. At some location along the length of the ingot L(T.sub.A) above the melt surface the ingot will pass through an isotherm T.sub.A at which agglomeration reactions occur (e.g., 1050.degree. C.). The ingot will pass through this point during the time it is being grown.
Essentially, growing defect-free ingots would require that temperature distribution in the hot zone be engineered to produce sufficiently long residence times of the ingot at temperatures in excess of a temperature T.sub.A (e.g., about 1050.degree. C.) at which agglomeration reactions occur to permit the out-diffusion of the intrinsic point defects. Maximizing the residence time of axial segment of the ingot above T.sub.A requires that the pull rate be slowed. However, slowing the pull rate drastically reduces throughput for the crystal puller.
The required residence time of each axial segment of the ingot at temperatures in excess of T.sub.A can be reduced somewhat by growing the crystal so that self-interstitial intrinsic point defects predominate. Self-interstitial defects are substantially more mobile than vacancy defects. It is still necessary to minimize the initial concentration of defects. However, to minimize the number of defects, the pull rate should be maximized within the interstitial growth conditions.
In order to produce a single crystal ingot which was substantially free of agglomerated micro-defects over its entire length, each axial segment along the full usable length of the ingot must pass through T.sub.A only after residing at temperature in excess of T.sub.A for a time necessary to out-diffuse the intrinsic point defects. Thus, the same relatively slow pull rate must be maintained even while the unusable end-cone of the ingot is being formed. Furthermore, the ingot must be raised at the same slow rate even after it is formed so that the lower end of the usable constant diameter portion of the ingot has sufficient residence time at temperatures above T.sub.A.
The tension between pull rate and residence time necessary for out-diffusion of intrinsic point defects becomes more acute as the diameter of the crystal grown increases. As the diameter of the ingot increases, the number of defects increases and the radial distance through which the defects must diffuse to the surface of the ingot increases.
Still further, minimization of the time for out-diffusion of self-interstitials makes it desirable to minimize the radial variation in initial interstitial concentration. This is achieved by minimizing the radial variation of the axial temperature gradient G.sub.O (r). In order to minimize the radial variation in the axial temperature gradient, it is desirable to minimize the average value of the axial temperature gradient G.sub.O at the ingot at the surface of the silicon melt. However in order to maximize the pull rate which will achieve interstitial growth conditions, it is desirable to minimize the average value of G.sub.O.
As a practical matter, very stringent process controls must be maintained in the operation of the crystal puller to produce single crystal silicon ingots which are substantially free of agglomerated intrinsic point defects. Moreover, there is a dramatic reduction in throughput for the crystal puller. Thus, there is presently a need for a process to grow single crystal ingots free of agglomerated intrinsic point defects which decouples or substantially decouples the operation of the crystal puller from the conditions necessary to out-diffuse intrinsic point defects.